• DocumentCode
    1557639
  • Title

    Dual-Layer Adaptive Error Control for Network-on-Chip Links

  • Author

    Yu, Qiaoyan ; Ampadu, Paul

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Univ. of Rochester, Rochester, NY, USA
  • Volume
    20
  • Issue
    7
  • fYear
    2012
  • fDate
    7/1/2012 12:00:00 AM
  • Firstpage
    1304
  • Lastpage
    1317
  • Abstract
    In this work, we present a new error control method to improve the energy efficiency and reliability of network-on-chip (NoC) links. The proposed method combines the error control coding (ECC) capabilities of the NoC´s datalink and network layers to dynamically adjust the error control strength in variable noise conditions. Network-layer ECC is used in low noise conditions and error control strength is enhanced by adding datalink-layer ECC in high noise regions. To switch between the two ECC modes at runtime without interrupting normal operation, we propose a dual-layer cooperative error control protocol and its hardware-efficient implementation using the concept of product codes. Theoretical analyses of residual error rate and performance show the proposed method outperforms previous single-layer fixed and adaptive error control schemes. Compared to previous solutions, the proposed method reduces residual packet error rate by up to four orders of magnitude, achieves up to 72% energy reduction and improves average latency by up to 64%. The energy and latency reduction benefits are maintained as the routing path length and packet size increase, at the cost of a moderate increase in area overhead.
  • Keywords
    error correction codes; integrated circuit interconnections; integrated circuit reliability; network routing; network-on-chip; area overhead; datalink layer; dual layer adaptive error control; dual layer cooperative error control protocol; energy efficiency; energy reduction; error control coding; latency reduction; network layer; network-on-chip links; product codes; reliability; residual packet error rate; routing path length; Codecs; Error correction; Error correction codes; History; Noise; Radiation detectors; Switches; Energy efficiency; error control coding (ECC); network-on-chip (NoC); on-chip interconnect; product code; reliability; transient error;
  • fLanguage
    English
  • Journal_Title
    Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1063-8210
  • Type

    jour

  • DOI
    10.1109/TVLSI.2011.2156436
  • Filename
    5892919