DocumentCode :
1557716
Title :
Managing complex boundary-scan operations
Author :
Eklow, Bill
Author_Institution :
Cisco Syst., Inc., San Jose, CA, USA
Volume :
29
Issue :
2
fYear :
2012
fDate :
4/1/2012 12:00:00 AM
Firstpage :
100
Lastpage :
102
Abstract :
The IEEE 1149.1 Standard for Test Access Port and Boundary-Scan Architecture was approved and released in 1990. Since that time, there have been two supplements and one revision to the standard. A second revision is currently in process. The 1149.1 standard was originally developed to address board level test access issues while at the same time enabling access to test logic inside the device. As technology has scaled over the last 20+ years, component and board level density and complexity have grown significantly. A new class of defects (Timing, Power, Signal Integrity) has also become more prevalent and much more difficult to detect.
Keywords :
IEEE standards; boundary scan testing; logic circuits; logic testing; IEEE 1149.1 standard; Test Access Port and Boundary-Scan Architecture; board-level complexity; board-level test access; complex boundary-scan operations; component-level density; logic test; signal integrity; timing; Boundary conditions; Complexity theory; IEEE standards; IP networks; Registers; Testing;
fLanguage :
English
Journal_Title :
Design & Test of Computers, IEEE
Publisher :
ieee
ISSN :
0740-7475
Type :
jour
DOI :
10.1109/MDT.2012.2187859
Filename :
6239684
Link To Document :
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