A linear MOS transconductor using source degeneration and adaptive biasing

Author

Kuo, Ko-Chi ; Leuciuc, Adrian

Author_Institution

Dept. of Electr. & Comput. Eng., State Univ. of New York, Stony Brook, NY, USA

Volume

48

Issue

10

fYear

2001

fDate

10/1/2001 12:00:00 AM

Firstpage

937

Lastpage

943

Abstract

This paper presents a new configuration for linear MOS voltage-to-current conversion (transconductance). The proposed circuit combines two previously reported linearization methods. The topology achieves 60-dB linearity for a fully balanced input dynamic range up to 1 V_pp at a 3.3-V supply voltage, with slightly decreasing performance in the unbalanced case. The linearity is preserved during the tuning process for a moderate range of transconductance values. The approach is validated by both computer simulations and experiments

Keywords

CMOS analogue integrated circuits; circuit tuning; continuous time filters; linearisation techniques; 3.3 V; adaptive biasing; balanced input dynamic range; circuit topology; continuous-time filters; linear MOS transconductors; linearization methods; multiple differential pairs cross-coupling; source degeneration; tuning process; voltage-to-current conversion; Active filters; Circuit optimization; Circuit topology; Linearity; MOSFET circuits; Resistors; Transconductance; Transconductors; Tuning; Voltage;

fLanguage

English

Journal_Title

Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on

Publisher

ieee

ISSN

1057-7130

Type

jour

DOI

10.1109/82.974782

Filename

974782