Excellent effects of hydrogen postoxidation annealing on inversion channel mobility of 4H-SiC MOSFET fabricated on (11 2 0) face

Author

Senzaki, Junji ; Kojima, Kazutoshi ; Harada, Shinsuke ; Kosugi, Ryoji ; Suzuki, Seiji ; Suzuki, Takaya ; Fukuda, Kenji

Author_Institution

Ultralow-Loss Power Device Technol. Res. Body & Power Electron. Res. Center, Nat. Inst. of Adv. Ind. Sci. & Technol., Ibaraki, Japan

Volume

23

Issue

1

fYear

2002

Firstpage

13

Lastpage

15

Abstract

Effects of hydrogen postoxidation annealing (H/sub 2/ POA) on 4H-silicon carbide (SiC) MOSFETs with wet gate oxide on the (112~0) face have been investigated. As a result, an inversion channel mobility of 110 cm/sup 2//Vs was successfully achieved using H/sub 2/ POA at 800/spl deg/C for 30 min. H/sub 2/ POA reduces the interface trap density by about one order of magnitude compared with that without H/sub 2/ POA, resulting in considerable improvement of the inversion channel mobility to 3.5 times higher than that without H/sub 2/ POA. In addition, 4H-SiC MOSFET with H/sub 2/ POA has a lower threshold voltage of 3.1 V and a wide gate voltage operation range in which the inversion channel mobility is more than 100 cm/sup 2//Vs.

Keywords

annealing; carrier mobility; interface states; inversion layers; oxidation; power MOSFET; silicon compounds; wide band gap semiconductors; 30 min; 4H-SiC MOSFET; 800 C; MOS capacitors; SiC; gate oxidation process; high-peak channel mobility; high-power device; hydrogen postoxidation annealing effect; interface trap density; inversion channel mobility; subthreshold characteristics; wet gate; Annealing; Electron mobility; Fabrication; Hydrogen; MOSFET circuits; Photonic band gap; Research and development; Silicon carbide; Thermal conductivity; Threshold voltage;

fLanguage

English

Journal_Title

Electron Device Letters, IEEE

Publisher

ieee

ISSN

0741-3106

Type

jour

DOI

10.1109/55.974797

Filename

974797