DocumentCode
1557962
Title
Interface-State Modeling of
–InGaAs MOS From Depletion to Inversion
Author
Chen, Han-Ping ; Yuan, Yu ; Yu, Bo ; Ahn, Jaesoo ; McIntyre, Paul C. ; Asbeck, Peter M. ; Rodwell, Mark J.W. ; Taur, Yuan
Author_Institution
Department of Electrical and Computer Engineering, University of California-San Diego, La Jolla, CA, USA
Volume
59
Issue
9
fYear
2012
Firstpage
2383
Lastpage
2389
Abstract
This paper presents a detailed analysis of the multifrequency capacitance–voltage and conductance–voltage data of
MOS capacitors. It is shown that the widely varied frequency dependence of the data from depletion to inversion can be fitted to various regional equivalent circuits derived from the full interface-state model. In certain regions, incorporating bulk-oxide traps in the interface-state model enables better fitting of data. By calibrating the model with experimental data, the interface-state density and the trap time constants are extracted as functions of energy in the bandgap, from which the stretch-out of gate voltage is determined. It is concluded that the commonly observed decrease of the 1-kHz capacitance toward stronger inversion is due to the increasing time constant for traps to capture majority carriers at the inverted surface.
Keywords
Analytical models; Capacitance; Data mining; Data models; Equivalent circuits; Integrated circuit modeling; Logic gates; $D_{rm it}$ ; Bulk-oxide trap; III–V; MOS; interface trap;
fLanguage
English
Journal_Title
Electron Devices, IEEE Transactions on
Publisher
ieee
ISSN
0018-9383
Type
jour
DOI
10.1109/TED.2012.2205255
Filename
6241408
Link To Document