Reduction of Charge Trapping in $\hbox {HfO}_{2}$ Film on Ge Substrates by Atomic Layer Deposition of Various Passivating Interfacial Layers

The dielectric performance and charge trapping properties of $ hbox{HfO}_{2}$ on a Ge substrate with various passivating interfacial layers (PILs), such as $hbox{SiO}_{x}hbox{N}_{y}$, $hbox{AlO}_{x}hbox{N}_{y}$, $hbox{HfO}_{x}hbox{N}_{y}$ , and $hbox{LaO}_{x}hbox{N}_{y}$, are investigated. The large capacitance–voltage ($C$– $V$) hysteresis of $ hbox{HfO}_{2}$ on a Ge substrate ($sim$1500 mV) was not improved by inserting either $hbox{HfO}_{x}hbox{N}_{y}$ or $hbox{LaO}_{x}hbox{N}_{y}$ PIL between the $hbox{HfO}_{2}$ and Ge substrates, while both $hbox{SiO}_{x}hbox{N}_{y}$ and $hbox{AlO}_{x}hbox{N}_{y}$ PILs induced a noticeable reduction of $C$–$V$ hysteresis. As the PILs\´ thicknesses increased, the $C$– $V$ hysteresis of $ hbox{HfO}_{2}$ with $hbox{SiO}_{x}hbox{N}_{y}$ PIL decreased to almost zero, while that of $hbox{HfO}_{2}$ with $hbox{AlO}_{x}hbox{N}_{y}$ PIL decreased but was saturated at approximately 400 mV. Furthermore, the charge trapping property of $ hbox{HfO}_{2}$ with $hbox{SiO}_{x}hbox{N}_{y}$ PIL on a Ge substrate is comparable to that of $hbox{HfO}_{2}$ grown on a Si substrate. Negligible $C$– $V$ hysteresis and negligible charge trapping of $hbox{HfO}_{2}$ with $ hbox{SiO}_{x}hbox{N}_{y}$ PIL were understood from the fact that $hbox{SiO}_{x}hbox{N}_{y}$ is more resistant to react with a Ge substrate and defective Ge suboxides are efficiently suppressed during the formation of $hbox{SiO}_{x} hbox{N}_{y}$ PIL and $hbox{HfO}_{2}$ layers.