Title :
Bus guardians: an effective solution for online detection and correction of faults affecting system-on-chip buses
Author :
Lajolo, Marcello
Author_Institution :
C&C Res. Labs., NEC, Princeton, NJ, USA
Abstract :
This paper presents a methodology for designing system-on-chip (SOC) interconnection architectures providing a high level of protection from crosstalk effects. An event driven simulator enriched with fault injection capabilities is exploited to evaluate the dependability level of the system being designed. The simulation environment supports several bus coding protocols and, thus, designers can easily evaluate different design alternatives. To enhance the dependability level of the interconnection architecture, we propose a distributed bus guardian scheme, where dedicated hardware modules monitor the integrity of the information transmitted over the bus and provide error correction mechanisms.
Keywords :
SPICE; VLSI; application specific integrated circuits; circuit CAD; crosstalk; error correction; integrated circuit interconnections; integrated circuit layout; probability; protection; SOC; bus coding protocols; crosstalk effects; dependability; distributed bus guardian; event driven simulator; fault injection; interconnection architecture; online testing; system-on-chip interconnection; Capacitance; Copper; Crosstalk; Delay; Design methodology; Fault detection; Protection; Signal analysis; System-on-a-chip; Wires;
Journal_Title :
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on