• DocumentCode
    1558776
  • Title

    SKOL: a system for logic synthesis and technology mapping

  • Author

    Bergamaschi, Reinaldo A.

  • Author_Institution
    Dept. of Electron. & Comput. Sci., Southampton Univ., UK
  • Volume
    10
  • Issue
    11
  • fYear
    1991
  • fDate
    11/1/1991 12:00:00 AM
  • Firstpage
    1342
  • Lastpage
    1355
  • Abstract
    SKOL, a system for combinational logic synthesis using library of cells, with emphasis on technology mapping algorithms, is described. It combines current multilevel optimization techniques with a new approach to the technology mapping problem. This approach uses a numerical string for representing the Boolean expressions and the library cells, which allows a fast selection process. Technology mapping is performed directly on the factored Boolean network, without decomposing it into primitive gates. A dynamic programming approach is used for mapping the whole Boolean network based on the possible matches for each node. Results from benchmark examples show that this approach is effective in reducing the final cell count. Comparisons with existing systems are presented
  • Keywords
    Boolean functions; combinatorial circuits; dynamic programming; logic CAD; CAD; SKOL; combinational logic synthesis; dynamic programming; factored Boolean network; library cells; multilevel optimization; numerical string; technology mapping; Dynamic programming; Equations; Helium; Libraries; Logic arrays; Logic design; Logic programming; Minimization; Optimizing compilers; Paper technology;
  • fLanguage
    English
  • Journal_Title
    Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0278-0070
  • Type

    jour

  • DOI
    10.1109/43.97614
  • Filename
    97614