DSP hardware design for fingerprint binarization and thinning on FPGA

Binarization and thinning are the two critical preprocessing stages designed for accurate extraction of minutiae features from the preprocessed image in fingerprint identification system. In this work an efficient design of DSP hardware for binarization and thinning of fingerprint images has been achieved based on Otsu´s thresholding method for binarization and Zhang and Suen´s method for thinning. Optimization has been achieved in our proposed hardware design, which improved the performance in terms of execution speed. The algorithms are designed in Xilinx System Generator using DSP hardware blocks and executed on Xilinx Spartan 6 FPGA (field programmable gate array) device.