• DocumentCode
    1559049
  • Title

    Digital design of sigmoid approximator for artificial neural networks

  • Author

    Basterretxea, K. ; Tarela, J.M. ; del Campo, I.

  • Author_Institution
    EHU, Pais Vasco Univ., Bilbao, Spain
  • Volume
    38
  • Issue
    1
  • fYear
    2002
  • fDate
    1/3/2002 12:00:00 AM
  • Firstpage
    35
  • Lastpage
    37
  • Abstract
    A digital design for piecewise-linear (PWL) approximation to the sigmoid function is presented. Circuit operation is based on a recursive algorithm that uses lattice operators max and min to approximating nonlinear functions. The resulting hardware is programmable, allowing for the control of the delay-time/approximation-accuracy rate
  • Keywords
    VLSI; function approximation; integrated circuit design; neural chips; piecewise linear techniques; VLSI; artificial neural networks; circuit operation; digital design; hardware implementation; lattice operators; nonlinear function approximation; piecewise-linear approximation; recursive algorithm; sigmoid approximator; silicon area;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:20020008
  • Filename
    977545
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1559049