• DocumentCode
    1559548
  • Title

    Cost-effective deterministic partitioning for rapid diagnosis in scan-based BIST

  • Author

    Bayraktaroglu, Ismet ; Orailoglu, Alex

  • Author_Institution
    California Univ., San Diego, La Jolla, CA, USA
  • Volume
    19
  • Issue
    1
  • fYear
    2002
  • Firstpage
    42
  • Lastpage
    53
  • Abstract
    Identifying fault-embedding scan cells is a significant challenge for fault diagnosis in scan based BIST. Deterministic partitioning techniques provide cost-effective solutions to this problem. Both mathematical solutions and simulations on hardware implementations demonstrate the effectiveness of these techniques
  • Keywords
    built-in self test; circuit simulation; fault diagnosis; logic partitioning; logic simulation; logic testing; cost-effective deterministic partitioning; fault-embedding scan cells; hardware implementations; mathematical solutions; rapid fault diagnosis; scan-based BIST; simulations; Built-in self-test; Circuit faults; Circuit testing; Clocks; Computational modeling; Counting circuits; Fault diagnosis; Hardware; Impedance matching; Linear feedback shift registers;
  • fLanguage
    English
  • Journal_Title
    Design & Test of Computers, IEEE
  • Publisher
    ieee
  • ISSN
    0740-7475
  • Type

    jour

  • DOI
    10.1109/54.980052
  • Filename
    980052
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1559548