Title :
Improving SoC design quality through a reproducible design flow
Author :
Magarshack, Philippe
Author_Institution :
STMicroelectronics, Crolles, France
Abstract :
The author examines the dynamics of system-on-a-chip design and addresses the fundamental question of whether there is a reproducible process for achieving the right design at the right time
Keywords :
network synthesis; reproducible design flow; system-on-chip design; Bluetooth; CMOS process; Cellular phones; Costs; Delay effects; Digital signal processing chips; GSM; Microcontrollers; Radio frequency; System-on-a-chip;
Journal_Title :
Design & Test of Computers, IEEE
