Abstract :
This paper presents an overview of MOS transistor modeling for RF integrated circuit design. It starts with the description of a physical equivalent circuit that can easily be implemented as a SPICE subcircuit. The MOS transistor is divided into an intrinsic part, representing mainly the active part of the device, and an extrinsic part responsible for most of the parasitic elements. A complete charge-based model of the intrinsic part is presented. The main advantage of this new charge-based model is to provide a simple and coherent description of the DC, AC, nonquasi-static (NQS), and noise behavior of the intrinsic MOS that is valid in all regions of operation. It is based on the forward and reverse charges qf and qr defined as the mobile charge densities, evaluated at the source and at the drain. This intrinsic model also includes a new simplified NQS model that uses a bias and frequency normalization allowing one to describe the high-order frequency behavior with only two simple functions. The extrinsic model includes all the terminal access series resistances, and particularly the gate resistance, the overlap, and junction capacitances as well as a substrate network. The latter is required to account for the signal coupling occurring at RF from the drain to the source and the bulk, through the junction capacitances. The noise model is then presented, including the effect of the substrate resistances on the RF noise parameters. All the aspects of the model are validated for a 0.25-μm CMOS process
Keywords :
CMOS integrated circuits; MOSFET; UHF integrated circuits; capacitance; equivalent circuits; field effect MMIC; integrated circuit design; integrated circuit modelling; integrated circuit noise; semiconductor device models; semiconductor device noise; 0.25 micron; CMOS process; MOS transistor modeling; MOSFETs; RF integrated circuits; RF large-signal characteristics; RF noise parameters; RFIC design; SPICE subcircuit; Y-parameters; bias normalization; charge-based model; extrinsic model; frequency normalization; gate resistance; high-order frequency behavior; intrinsic model; junction capacitances; mobile charge densities; noise behavior; noise model; overlap capacitances; parasitic elements; physical equivalent circuit; semiconductor device modeling; signal coupling; substrate network; substrate resistances; terminal access series resistances; transit frequency; Capacitance; Equivalent circuits; Integrated circuit modeling; Integrated circuit synthesis; MOSFETs; RF signals; Radio frequency; Radiofrequency integrated circuits; SPICE; Semiconductor device modeling;
