• DocumentCode
    1560127
  • Title

    A regularity-based hierarchical symbolic analysis method for large-scale analog networks

  • Author

    Doboli, Alex ; Vemuri, Ranga

  • Author_Institution
    Dept. of Electr. & Comput. Eng., State Univ. of New York, Stony Brook, NY, USA
  • Volume
    48
  • Issue
    11
  • fYear
    2001
  • fDate
    11/1/2001 12:00:00 AM
  • Firstpage
    1054
  • Lastpage
    1068
  • Abstract
    This paper presents a novel hierarchical symbolic analysis method for automatically producing relationships between the parameters of an analog network and the building blocks of the network. The originality of the symbolic technique stems from exploiting regularity aspects for addressing the exponential complexity of the symbolic expressions. The regularity aspects that were identified are: 1) structural regularity: majority of the network blocks are connected in identical templates and 2) symbolic parameter regularity: parameters for a connection template require similar sets of operations. The paper discusses the three components of the proposed symbolic analysis method: 1) an efficient representation of symbolic expressions, 2) an algorithm for construction of symbolic expressions; and 3) a decomposition technique for extracting the structural regularity of a network. For large networks, the size of the symbolic models produced by our symbolic analysis method is much less than the size of the models produced by other methods such as the two-graph method. We mathematically show that the generated models are of polynomial size if the two kinds of regularity are exploited. The described symbolic technique was implemented and used successfully for synthesis and optimization of different analog systems such as filters and communication systems
  • Keywords
    analogue integrated circuits; circuit CAD; circuit complexity; circuit optimisation; integrated circuit design; matrix decomposition; search problems; signal flow graphs; symbol manipulation; transfer functions; decomposition technique; divide-and-conquer; efficient representation; exponential complexity; large-scale analog networks; lazy generation; network building blocks; partitioning; polynomial size models; regularity-based hierarchical symbolic analysis method; signal-flow graph; structural regularity; symbolic expressions; symbolic parameter regularity; tabu search; top-down symbolic analysis method; transfer functions; Circuit synthesis; Engines; Filters; Hardware; Large-scale systems; Military computing; Network synthesis; Numerical simulation; Performance evaluation; Transfer functions;
  • fLanguage
    English
  • Journal_Title
    Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1057-7130
  • Type

    jour

  • DOI
    10.1109/82.982361
  • Filename
    982361