Title :
An adaptive analog noise-predictive decision-feedback equalizer
Author :
Le, Michael Q. ; Hurst, Paul J. ; Keane, John P.
Author_Institution :
Dept. of Electr. & Comput. Eng., California Univ., Davis, CA, USA
fDate :
2/1/2002 12:00:00 AM
Abstract :
In this paper, an adaptive noise-predictive decision-feedback equalizer (NPDFE) is presented. The NPDFE architecture and its implementation are described. The NPDFE consists of an analog finite-impulse-response (FIR) forward equalizer, a recursive analog equalizer for noise prediction, and a decision-feedback equalizer (DFE). The recursive equalizer reduces noise enhancement and improves the signal-to-noise ratio (SNR) at the decision slicer input. The prototype targets a magnetic recording channel modeled by a Lorentzian impulse response. Measured results show that compared to a conventional DFE with FIR forward equalizer, the NPDFE achieves a SNR improvement of about 2 dB with PW50=2.5T. The NPDFE consumes 130 mW at a data rate of 100 Mb/s and occupies 1.3 mm2 of die area in a 0.5-μm CMOS process
Keywords :
CMOS analogue integrated circuits; adaptive equalisers; decision feedback equalisers; digital magnetic recording; intersymbol interference; magnetic recording noise; transient response; 100 Mbit/s; 130 mW; CMOS process; Lorentzian impulse response; adaptive noise-predictive decision-feedback equalizer; analog FIR forward equalizer; analog decision-feedback equalizer; automatic gain control circuit; disk-drive read channel; equalizer implementation; improved SNR; intersymbol interference; magnetic recording channel; mixed analog-digital integrated circuits; recursive analog equalizer; sign-error LMS algorithm; sign-sign LMS algorithm; Decision feedback equalizers; Finite impulse response filter; Intersymbol interference; Laboratories; Magnetic noise; Nonlinear filters; Prototypes; Semiconductor device noise; Signal to noise ratio; Solid state circuits;
Journal_Title :
Solid-State Circuits, IEEE Journal of