Design optimization of MPEG-2 AAC decoder

Author

Bang, Kyoung Ho ; Kim, Joon Seok ; Jeong, Nam Hun ; Park, Young Cheol ; Youn, Dae Hee

Author_Institution

Dept. of Electr. & Electron. Eng., Yonsei Univ., Seoul, South Korea

Volume

47

Issue

4

fYear

2001

fDate

11/1/2001 12:00:00 AM

Firstpage

895

Lastpage

903

Abstract

A new design for the 2-channel main-profile MPEG-2 AAC decoder is presented. To support an architectural modularity of the design, the AAC decoding algorithm has been implemented using three hardware modules: Huffman decoder, predictor, and a 20-bit programmable DSP core. The Huffman decoder module was designed to complete its job within a single clock cycle time. Also, the predictor module is executed in parallel with other modules, so that the system resource is maximally utilized. The Huffman decoder and predictor modules have been coded using VHDL, and other MPEG-2 AAC decoding routines were programmed using assembly of the DSP core. Functional simulations verified that the designed system was able to decode standard MPEG-2 AAC main-profile bitstreams using only 16.9 MIPS while it was able to maintain a high accuracy of the output PCM

Keywords

Huffman codes; audio coding; circuit optimisation; code standards; data compression; digital signal processing chips; hardware description languages; programmable circuits; telecommunication standards; 16.9 MIPS; 20 bit; AAC decoding algorithm; DSP core; Huffman decoder; MPEG audio standards; MPEG-2 AAC decoder; PCM; VHDL; advanced audio coding; design optimization; functional simulations; hardware modules; main-profile MPEG-2 AAC decoder; modular architecture; predictor module; programmable DSP core; Assembly; Audio coding; Clocks; Decoding; Design engineering; Design optimization; Digital signal processing; Filter bank; Hardware; Huffman coding;

fLanguage

English

Journal_Title

Consumer Electronics, IEEE Transactions on

Publisher

ieee

ISSN

0098-3063

Type

jour

DOI

10.1109/30.982805

Filename

982805