DocumentCode :
1560442
Title :
Design considerations and verification testing of an SEE-hardened quad comparator
Author :
van Onno, N.W. ; Doyle, Brent R.
Author_Institution :
Intersil Corp., Melbourne, FL, USA
Volume :
48
Issue :
6
fYear :
2001
fDate :
12/1/2001 12:00:00 AM
Firstpage :
1859
Lastpage :
1864
Abstract :
Describes design considerations and single-event effect (SEE) testing results of a hardened quad comparator equivalent to the industry standard "139" device. The hardened part uses redundancy and hardened complementary BiCMOS processing to achieve improved SEE performance
Keywords :
BiCMOS analogue integrated circuits; comparators (circuits); integrated circuit design; integrated circuit testing; radiation hardening (electronics); redundancy; SEE performance; SEE-hardened quad comparator; analog comparator; analog integrated circuit; design considerations; hardened complementary BiCMOS processing; radiation effects; redundancy; verification testing; Analog integrated circuits; BiCMOS integrated circuits; Circuit testing; Fabrication; Helium; Integrated circuit testing; Radiation effects; Radiation hardening; Redundancy; Voting;
fLanguage :
English
Journal_Title :
Nuclear Science, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9499
Type :
jour
DOI :
10.1109/23.983143
Filename :
983143
Link To Document :
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