• DocumentCode
    1560459
  • Title

    SEE analysis of digital InP-based HBT circuits at gigahertz frequencies

  • Author

    Weatherford, Todd R. ; Schiefelbein, Peter K.

  • Author_Institution
    Naval Postgraduate Sch., Monterey, CA, USA
  • Volume
    48
  • Issue
    6
  • fYear
    2001
  • fDate
    12/1/2001 12:00:00 AM
  • Firstpage
    1980
  • Lastpage
    1986
  • Abstract
    A device/circuit simulation is used to analyze a gigahertz clocked emitter-coupled logic circuit being perturbed by a single event. Results provide an understanding of charge collection in the heterojunction bipolar transistor. A technique for single-event hardening is demonstrated by simulation
  • Keywords
    III-V semiconductors; bipolar logic circuits; circuit simulation; emitter-coupled logic; heterojunction bipolar transistors; indium compounds; integrated circuit modelling; radiation effects; radiation hardening (electronics); III V semiconductors; InP; SEE analysis; charge collection; device/circuit simulation; digital HBT circuits; emitter-coupled logic circuit; gigahertz frequencies; heterojunction bipolar transistor; single event; single-event hardening; Circuit simulation; Clocks; Computational modeling; Frequency; Heterojunction bipolar transistors; Integrated circuit measurements; Integrated circuit technology; Logic circuits; Space technology; Voltage;
  • fLanguage
    English
  • Journal_Title
    Nuclear Science, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9499
  • Type

    jour

  • DOI
    10.1109/23.983160
  • Filename
    983160
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1560459