Title :
A PN triangle generation unit for fast and simple tessellation hardware
Author :
Chung, Kyusik ; Kim, Lee-Sup
Author_Institution :
KAIST, Daejeon, South Korea
Abstract :
Reducing the required memory bandwidth is a main issue in 3D computer graphics. PN triangle solves the memory bandwidth problem by using curved surface representation and tessellation. It reconstructs a smooth and detailed 3D model from blocky one on graphics hardware and then reduces bandwidth consumption. To implement a simple dedicated hardware executing complex operations of tessellation, we adopt the de Casteljau algorithm and utilize its repetitive property. The proposed PN triangle generation unit can be constructed with only one linear interpolator, a number of temporal registers and control logic. The analysis of load balancing shows that implementing two linear interpolators is the best choice for hardware performance and efficiency.
Keywords :
computational geometry; computer graphics; interpolation; solid modelling; 3D computer graphics; 3D model; PN triangle generation unit; control logic; curved surface representation; de Casteljau algorithm; linear interpolator; load balancing; memory bandwidth; temporal register; tessellation hardware architecture; Bandwidth; Computer graphics; Geometry; Hardware; Image reconstruction; Load management; Logic; Performance analysis; Surface reconstruction; Traffic control;
Conference_Titel :
Circuits and Systems, 2003. ISCAS '03. Proceedings of the 2003 International Symposium on
Print_ISBN :
0-7803-7761-3
DOI :
10.1109/ISCAS.2003.1206077