Title :
A comprehensive model to accurately calculate the gate capacitance and the leakage from DC to 100 MHz for ultra thin dielectrics
Author :
Pantisano, L. ; Ramos, J. ; Serrano, E. San Andrés ; Roussel, Ph J. ; Sansen, W. ; Groeseneken, G.
Author_Institution :
IMEC, Leuven, Belgium
Abstract :
A straightforward model and experimental methodology to extract simultaneously the gate capacitance and the gate leakage is presented for ultra thin oxides. Parasitic effects at high frequencies are minimized using a transmission-line approach while a robust extraction algorithm accounts for eventual instrument inaccuracies.
Keywords :
capacitance measurement; dielectric materials; leakage currents; 0 to 100 MHz; gate capacitance calculation; gate leakage; parasitic effects; transmission-line approach; ultra thin dielectrics; ultra thin oxides; Capacitance; Capacitance-voltage characteristics; Dielectrics; Electrical resistance measurement; Fingers; Frequency measurement; Probes; Testing; Transmission lines; Voltage;
Conference_Titel :
Microelectronic Test Structures, 2006. ICMTS 2006. IEEE International Conference on
Print_ISBN :
1-4244-0167-4
DOI :
10.1109/ICMTS.2006.1614308
