DocumentCode
1560933
Title
Real-time implementation of H.263+ using TI TMS320c6201 digital signal processor
Author
Shih, K.-T. ; Tsai, C.-Y. ; Hang, H.-M.
Author_Institution
Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan
Volume
2
fYear
2003
Abstract
In this paper, we use a digital signal processor (DSP) to implement a real-time H.263+ codec. We use fast algorithms to reduce the codec computational complexity. Furthermore, the C programs are modified to take advantages of the DSP architecture and its C compiler features to reduce the on-chip memory and to increase the processing speed. In addition, a simple but effective rate-control algorithm is implemented to maintain the target bit rate. We can encode about 20 QCIF frames/second using one TI DSP. And the average decoding speed is about 26 QCIF frames/second.
Keywords
digital signal processing chips; quantisation (signal); video codecs; H.263+; TI TMS320c6201 digital signal processor; bit rate; codec; computational complexity; decoding speed; on-chip memory; processing speed; rate control algorithm; real-time implementation; Bit rate; Codecs; Computer architecture; Digital signal processing; Digital signal processors; Discrete cosine transforms; Quantization; Signal processing algorithms; VLIW; Video compression;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2003. ISCAS '03. Proceedings of the 2003 International Symposium on
Print_ISBN
0-7803-7761-3
Type
conf
DOI
10.1109/ISCAS.2003.1206120
Filename
1206120
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