DocumentCode :
1561142
Title :
Clock synchronization through handshake signalling
Author :
Kessels, Joep ; Peeters, Ad ; Wielage, Paul ; Kim, Suk-Jin
Author_Institution :
Philips Res. Lab., Eindhoven, Netherlands
fYear :
2002
Firstpage :
59
Lastpage :
68
Abstract :
We present a method for synchronizing pausible clocks in GALS (Globally Asynchronous, Locally Synchronous) systems. In contrast to most conventional GALS schemes the method is not based on including in each ring oscillator a synchronizing element (such as for instance an arbiter) which on one side can pause the clock and on the other side offers a handshake interface. Instead, we propose a scheme in which each synchronous module has both an incoming and an outgoing clock signal, which have been obtained by opening the module´s ring oscillator. Since these clock signals also behave as handshake signals, handshake circuits can be used to synchronize the clocks. We demonstrate the technique in the context of processors and memories. All the designs have been simulated and showed functionally correct.
Keywords :
CMOS digital integrated circuits; VLSI; asynchronous circuits; integrated circuit design; synchronisation; GALS; clock synchronization; globally asynchronous locally synchronous systems; handshake circuits; handshake signalling; incoming clock signal; outgoing clock signal; pausible clocks; ring oscillator; Circuit simulation; Clocks; Laboratories; Logic; Memory architecture; Metastasis; Ring oscillators; Synchronization; System-on-a-chip; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Asynchronous Circuits and Systems, 2002. Proceedings. Eighth International Symposium on
ISSN :
1522-8681
Print_ISBN :
0-7695-1540-1
Type :
conf
DOI :
10.1109/ASYNC.2002.1000296
Filename :
1000296
Link To Document :
بازگشت