Design and implementation of a formant speech synthesiser ASIC

The authors describe the design and implementation of an application-specific integrated circuit (ASIC) for multichannel formant speech synthesis. The primary objective was to develop an efficient bit-serial VLSI structure with sufficient acoustical and processing performance for high-quality, intelligible, multichannel synthetic speech production. Functional design was performed using the Denyer/Renshaw FIRST Silicon compiler. The implementation of a technology-independent FIRST bit-serial primitive operator library using the MODEL hardware description language is also described. This library has been implemented on a European Silicon Structures (ES2) SOLO-1000 Standard cell design tool and has been used to design the device