10 Gbps backplane design methodology with sensitivity analysis and statistical analysis

Author

Kim, Jaemin ; Baek, Seungyong ; Park, Hyunjeong ; Kim, Sukho ; Hong, Youngsoo ; Lim, Dongsoon ; Kim, Joungho

Author_Institution

Dept. of Electr. Eng. & Comput. Sci., KAIST, Daejeon

Volume

1

fYear

2005

Abstract

In this paper, we propose a new design methodology for the high speed system backplane with sensitivity analysis and statistical analysis, and verify it with 10 Gbps system in time domain simulation and measurement. For fast and easy extraction of the optimal condition, sensitivity analysis with Taguchi method and frequency domain analysis are used. Also, for the consideration of process variation, statistical analysis is used. We verify the new design methodology by simulation result, measurement result, and the probability distribution of jitter and voltage margin due to process variation

Keywords

Taguchi methods; frequency-domain analysis; high-speed techniques; printed circuit design; sensitivity analysis; statistical analysis; time-domain analysis; 10 Gbit/s; Taguchi method; backplane design methodology; frequency domain analysis; high speed system backplane; jitter; probability distribution; sensitivity analysis; statistical analysis; time domain measurement; time domain simulation; voltage margin; Analytical models; Backplanes; Design methodology; Frequency domain analysis; Probability distribution; Sensitivity analysis; Statistical analysis; Time domain analysis; Time measurement; Velocity measurement;

fLanguage

English

Publisher

ieee

Conference_Titel

Electronic Packaging Technology Conference, 2005. EPTC 2005. Proceedings of 7th

Conference_Location

Singapore

Print_ISBN

0-7803-9578-6

Type

conf

DOI

10.1109/EPTC.2005.1614364

Filename

1614364