Multi-level numerical analysis on the reliability of Cu/low-k interconnection in FCBGA package

Thermo-mechanical simulation is carried out on the Cu/low-k FCBGA (flip-chip ball grid array) package for high performance server applications. Global-local modeling methodology is performed. Layered structures for both build-up substrate and Cu/low-k layers are established. The build-up substrate is divided into inner and outer areas based on the Cu distribution, and equivalent properties for each area are obtained. A homogenization method which enables to take into account exact Cu/low-K layout is developed to obtain the equivalent properties of interconnects. Based on the established methodology, packaging effect has been studied, then potential sites for delamination are identified. For the critical sites, fracture mechanics approach is applied, and energy release rate is computed in order to quantify the packaging effect on Cu/low-k interconnection reliability. Packaging induced stresses are evaluated for different interconnect architectures and the effect of the Cu/low-k layout regarding delamination hazard is investigated. Discussions are also carried out on various parameters such as the failure criterion to use, the length of the introduced crack, and the balance between packaging stress and local stress