DocumentCode
1561682
Title
An approach for improving the speed of content addressable memories
Author
Hyjazie, Jihad Mohammad ; Wang, Chunyan
Author_Institution
Dept. of Electr. & Comput. Eng., Concordia Univ., Montreal, Que., Canada
Volume
5
fYear
2003
Abstract
In this paper, a scheme of CAM cell design is proposed. Using this scheme, the standby states of CAMs can be eliminated, which results in a high efficiency of the circuit operation. The speed of the search operations can be doubled and the power dissipation can be significantly reduced.
Keywords
cellular arrays; content-addressable storage; integrated memory circuits; CAM cell design; circuit operation; content addressable memories; efficiency; power dissipation; speed; standby states; Artificial intelligence; Associative memory; CADCAM; Circuits; Computer aided manufacturing; Databases; Local area networks; Logic; Power dissipation; Random access memory;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2003. ISCAS '03. Proceedings of the 2003 International Symposium on
Print_ISBN
0-7803-7761-3
Type
conf
DOI
10.1109/ISCAS.2003.1206223
Filename
1206223
Link To Document