Design of programmable embedded IF source for design self-test

Author

Choi, S. ; Eisenstadt, W. ; Fox, R.

Author_Institution

Florida Univ., Gainesville, FL, USA

Volume

5

fYear

2003

Abstract

A programmable embedded IF source has been designed for embedded communication self-test using an on-chip memory block, a shifter register, and a noise-shaping filter. An on-chip memory element is programmed with software-generated delta-sigma modulated code. The frequency of the IF source is programmable by using a variable on-chip clock generator. The design simulation shows 45 dB single-tone SFDR with a 1200 μm × 900 μm chip area. Another improved design is in progress, which is implemented with analog FIR filtering techniques. This approach relaxes the design specifications for noise shaping filters, yielding a smaller circuit.

Keywords

FIR filters; VLSI; built-in self test; comb filters; integrated circuit testing; mixed analogue-digital integrated circuits; programmable circuits; radiofrequency integrated circuits; system-on-chip; 1200 micron; 900 micron; RFIC self-testing scheme; analog FIR filtering techniques; comb filtering; design self-test; embedded communication self-test; memory-based periodic bitstream method; noise-shaping filter; on-chip memory block; programmable embedded IF source design; shifter register; software-generated delta-sigma modulated code; variable on-chip clock generator; Built-in self-test; Circuit simulation; Clocks; Delta modulation; Filtering; Finite impulse response filter; Frequency; Modulation coding; Noise shaping; Registers;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2003. ISCAS '03. Proceedings of the 2003 International Symposium on

Print_ISBN

0-7803-7761-3

Type

conf

DOI

10.1109/ISCAS.2003.1206242

Filename

1206242