• DocumentCode
    1561882
  • Title

    DSP datapath synthesis eliminating global interconnect

  • Author

    Duncan, Andrew A. ; Hendry, David C.

  • Author_Institution
    Dept. of Eng., Aberdeen Univ., UK
  • fYear
    1993
  • Firstpage
    46
  • Lastpage
    51
  • Abstract
    CASS (column architecture synthesis system) is a behavioral high level synthesis system for DSP applications. It uses a column based target architecture and in-the-cell routing to produce compact layout which eliminates the need for global wiring. This is achieved using bit-sliced cells which butt together to produce the data path. A description of the architecture and algorithms which produce the datapath is given. It is also shown that this approach gives large area savings when compared to a conventional system
  • Keywords
    computer architecture; digital signal processing chips; graph colouring; graph theory; high level synthesis; logic CAD; C language; DSP datapath synthesis; behavioral high level synthesis; bit-sliced cells; column architecture synthesis system; column based target architecture; global interconnect; global wiring; graph colouring; Communication system control; Costs; Digital signal processing; High level synthesis; Routing; Scheduling; Time factors; Timing; Topology; Wiring;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design Automation Conference, 1993, with EURO-VHDL '93. Proceedings EURO-DAC '93., European
  • Conference_Location
    Hamburg
  • Print_ISBN
    0-8186-4350-1
  • Type

    conf

  • DOI
    10.1109/EURDAC.1993.410615
  • Filename
    410615