Influence of solder volume on interfacial reaction between Sn-Ag-Cu solder and TiW/Cu/Ni UBM

Author

Wong, C.K. ; Pang, John H L ; Sun, Y.F. ; Ng, F.L. ; Tew, J.W. ; Fan, W.

Author_Institution

Singapore Inst. of Manuf. Technol.

Volume

2

fYear

2005

Abstract

Solder bump interconnection is a widely accepted approach for high performance and miniaturized packaging. Solder bump pitch of 90 mum or less will be needed to support chip-to-next-level packaging when the integrated circuitry features reach 45 nm by 2010 [ITRS 2004 Update - Assembly & Packaging]. Lead-free solder is expected to be widely implemented by then. Intermetallic compound (IMC) formation is inherent in the soldering process. Excessive IMC is detrimental to interconnection reliability and this is expected to be more pronounced as IC chips get thinner and smaller. In this study, Sn-Ag-Cu (SAC) solder bumps on under-bump-metallization (UBM) comprised of sputtered TiW/Cu and electrolytic plated Cu and Ni were evaluated. Solder bumps with pad diameters of 200, 70 and 40 mum were produced by solder paste printing on matching UBM prepared on silicon wafers and reflowed. SAC solder bump IMC morphology and its growth kinetics, and bump shear strength after isothermal aging were investigated

Keywords

copper alloys; integrated circuit metallisation; integrated circuit packaging; integrated circuit reliability; reflow soldering; shear strength; silver alloys; tin alloys; titanium compounds; 200 micron; 40 micron; 70 micron; Sn-Ag-Cu; Sn-Ag-Cu solder; TiW-Cu; TiW/Cu/Ni UBM; bump shear strength; chip-to-next-level packaging; growth kinetics; integrated circuitry; interconnection reliability; interfacial reaction; intermetallic compound formation; isothermal aging; lead-free solder; silicon wafers; solder bump interconnection; solder bump pitch; solder paste printing; solder volume; soldering process; under-bump-metallization; Assembly; Environmentally friendly manufacturing techniques; Integrated circuit interconnections; Integrated circuit packaging; Integrated circuit reliability; Intermetallic; Lead; Printing; Silicon; Soldering;

fLanguage

English

Publisher

ieee

Conference_Titel

Electronic Packaging Technology Conference, 2005. EPTC 2005. Proceedings of 7th

Conference_Location

Singapore

Print_ISBN

0-7803-9578-6

Type

conf

DOI

10.1109/EPTC.2005.1614454

Filename

1614454