DocumentCode
1563072
Title
A modular test structure for CMOS mismatch characterization
Author
Conti, Massimo ; Crippa, Puolo ; Fedecostante, F. ; Orcioni, Simone ; Ricciardi, F. ; Turchetti, Cluudio ; Vendrame, L.
Author_Institution
Dipt. di Elettronica ed Automatica, Universita Politecnica delle Marche, Ancona, Italy
Volume
5
fYear
2003
Abstract
In this work a new test structure for mismatch characterization of CMOS technologies is presented. The test structure is modular, with a reduced area and it can be inserted in the space between the dies (scribe lines) on the wafers. The test structure has been implemented in a standard 0.18-μm digital CMOS technology.
Keywords
CMOS digital integrated circuits; MOSFET; integrated circuit layout; integrated circuit testing; 0.18 micron; 0.18-μm digital CMOS technology; CMOS mismatch characterization; dies; modular test structure; n-MOSFETs; power-on-reset circuit; scribe lines; shift register; test chip architecture; CMOS technology; Circuit testing; Clocks; MOSFET circuits; Performance evaluation; Semiconductor device modeling; Silicon; Space technology; Time measurement; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2003. ISCAS '03. Proceedings of the 2003 International Symposium on
Print_ISBN
0-7803-7761-3
Type
conf
DOI
10.1109/ISCAS.2003.1206376
Filename
1206376
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