Title :
Computer-aided technique for optimal design of defect-tolerant VLSI with built-in redundancy
Author :
Shagurin, Igor ; Ivanov, Andrej
Author_Institution :
Moscow Eng. Phys. Inst., Russia
Abstract :
Methods for taking account of the redundancy influence on the VLSI yield are developed. Using some fundamental redundancy arrangement methods, the interrelation between parameters of initial units and redundant hardware is discussed. On this basis, the generalized design approach is proposed. It can be adapted to demands of application-specific redundant unit design. Based on this approach the program PRIDE is developed. PRIDE provides automatic yield estimation and supports the redundancy logic design
Keywords :
VLSI; application specific integrated circuits; integrated circuit reliability; integrated circuit yield; integrated logic circuits; logic CAD; logic design; redundancy; PRIDE; VLSI yield; application-specific redundant unit design; automatic yield estimation; built-in redundancy; defect-tolerant VLSI; error correcting codes; optimal design; redundancy logic design; Delay; Hardware; Integrated circuit synthesis; Lead; Libraries; Macrocell networks; Redundancy; Statistics; Very large scale integration; Yield estimation;
Conference_Titel :
Design Automation Conference, 1993, with EURO-VHDL '93. Proceedings EURO-DAC '93., European
Conference_Location :
Hamburg
Print_ISBN :
0-8186-4350-1
DOI :
10.1109/EURDAC.1993.410628
