System-on-Chip design using intellectual properties with imprecise design costs

This paper presents an IP-based System-on-Chip (SoC) synthesis framework focusing on how to select intellectual properties (IP´s) from different sources and how to integrate the selected IP´s using on-chip buses. In order to synthesize an on-chip bus-based SoC architecture using IP´s with imprecise design costs, we propose a possibilistic mixed integer linear programming (PMILP) model, which is converted into an equivalent mixed integer linear programming (MILP) model without increasing the computational complexity. Experimental results on an MP3 decoding system show that the IP-centric design space with uncertainty can be successfully explored using the proposed scheme.