Title :
Fault tolerant datapath based on algorithm redundancy and vote-writeback mechanism
Author :
Kaneko, Mineo ; Oshio, Kazuaki
Author_Institution :
Japan Adv. Inst. of Sci. & Technol., Ishikawa, Japan
Abstract :
In this paper, we propose the combination of triple algorithm redundancy and vote-writeback mechanism for realizing concurrently error correctable Register Transfer (RT) level datapath of a specified computation algorithm. The vote-writeback mechanism will be introduced to reduce wire complexity around voters compared with other conventional voting scheme. Even though the vote-writeback mechanism can not correct erroneous data on a faulty register, the overall fault tolerance of the datapath with respect to any single fault in the datapath part can be guaranteed by this vote-writeback mechanism and appropriate insertion of voters.
Keywords :
error correction; fault tolerance; high level synthesis; redundancy; RTL design; algorithm-based fault tolerance; computation algorithm; concurrent error correction; fault tolerant datapath; triple algorithm redundancy; vote-writeback mechanism; wire complexity; Concurrent computing; Costs; Error correction; Fabrication; Fault tolerance; High level synthesis; Redundancy; Registers; Voting; Wire;
Conference_Titel :
Circuits and Systems, 2003. ISCAS '03. Proceedings of the 2003 International Symposium on
Print_ISBN :
0-7803-7761-3
DOI :
10.1109/ISCAS.2003.1206395
