DocumentCode
1563409
Title
Digital controller design for buck converter with the reduction of phase transition and output voltage oscillation under transient state
Author
Ye-Then Chang ; Yen-Shin Lai
Author_Institution
Center for Power Electron. Technol., Nat. Taipei Univ. of Technol., Taipei
fYear
2008
Firstpage
376
Lastpage
380
Abstract
The main theme of this paper is to present a new digital controller design method for buck converter. The presented digital controller is aimed at reducing the phase transition in frequency domain and output voltage oscillation under transient state. These special features can be achieved by taking both transfer function of control to output and output impedance into consideration. The zeros of controller are selected neither real nor pole-zero cancellation. As compared to previous approaches which determine the zeros of controller based upon pole-zero cancellation or simple real zeros, the presented method selects these zeros according to the quality factor of plant. As the quality factor of compensator zeros are in the range of 0.3 to 0.5 times of quality factor, the phase transition and the oscillation of output voltage under transient state can be reduced significantly. Experimental results derived from an FPGA experimental digital-controlled buck converter with switching frequency up to 200 kHz are presented for confirmation.
Keywords
Q-factor; digital control; field programmable gate arrays; power convertors; FPGA; buck converter; digital controller design; frequency domain; output voltage oscillation; phase transition reduction; pole-zero cancellation; quality factor; transient state; Digital controller design; Phase transition; Quality factor;
fLanguage
English
Publisher
iet
Conference_Titel
Power Electronics, Machines and Drives, 2008. PEMD 2008. 4th IET Conference on
Conference_Location
York
ISSN
0537-9989
Print_ISBN
978-0-86341-900-3
Type
conf
Filename
4528864
Link To Document