Layout considerations for improving the on-state performance of vertical SiC switching devices

The presented work shows simulated and experimental results of a method to improve the on-resistance of SiC Power devices by an optimized utilization of the drift zone. Mostly SiC devices have quite thin drift layers compared to silicon devices. Thus, the lateral dimensions of cell-like structures are much larger that the actual cell thickness in the direction of the current flow. Due to design and technology limitations, a certain fraction of the cell is not involved in forward current flow. The presented method - a local doping enhancement - improves the current flow through the cell and reduces the on-resistance of the device. After a short introduction of the investigated device structure, the method will be presented by simulation results and proven by experimental evidence. It will be shown, that for a 1200 V device e.g., the on-resistance can be reduced by approximately 25%.