• DocumentCode
    1564020
  • Title

    Test function embedding algorithms with application to interconnected finite state machines

  • Author

    Kanjilal, Suman ; Chakradhar, Srimat T. ; Agrawal, Vishwani D.

  • Author_Institution
    Dept. of Comput. Sci., Rutgers Univ., New Brunswick, NJ, USA
  • fYear
    1993
  • Firstpage
    219
  • Lastpage
    224
  • Abstract
    The authors present new algorithms for embedding a test function in the state diagram of a finite state machine. When possible, the test function is embedded in the given object machine without using an extra input line. When such embedding is not possible, an extra input line is added to the object machine to make the embedding possible. For the extra input case, partition theory and the state variable dependencies of the object machine are used to obtain a mapping of the test machine states onto the object machine states. This mapping introduces a minimum number of extra state variable dependencies in the augmented machine as compared to the dependencies in the object machine. Experimental results on several MCNC benchmarks show that the method yields augmented machine implementations that have smaller areas than the corresponding full scan designs. The test generation complexity for the augmented machine implementation is the same as that for a full scan design. The embedding of test functions in machines specified as interconnection of finite state machines is also considered
  • Keywords
    automatic testing; computational complexity; design for testability; finite state machines; interconnected systems; logic CAD; logic testing; sequential circuits; MCNC benchmarks; augmented machine implementations; embedding algorithms; interconnected finite state machines; object machine; test function; test generation complexity; Application software; Automata; Circuit testing; Computer science; Integrated circuit interconnections; Laboratories; Logic design; Logic testing; National electric code; Sequential analysis;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design Automation Conference, 1993, with EURO-VHDL '93. Proceedings EURO-DAC '93., European
  • Conference_Location
    Hamburg
  • Print_ISBN
    0-8186-4350-1
  • Type

    conf

  • DOI
    10.1109/EURDAC.1993.410641
  • Filename
    410641