DocumentCode :
1564733
Title :
Minimizing Charging Potential during Passivation Etch
Author :
Kenneth, Yue Kok Hong ; Tiong, Tay Chin ; James, Se Kwang Leong ; Kiat, Goh Boon
Author_Institution :
Syst. on Silicon Manuf. Co. Pte. Ltd., Singapore
fYear :
2008
Firstpage :
282
Lastpage :
285
Abstract :
In this paper we evaluate the effect of charging damage during passivation etch. This will demonstrate particularly the importance of proper wafer grounding in high radio frequency (RF) power passivation etch process. Charge buildup can occur because of severe ion bombardment of the wafer surface due to high RF power plasma etch process. As a result, plasma induced charges on the wafer, if not properly controlled can cause damage to the underlying layers and induce other reliability problems.
Keywords :
etching; charge buildup; charging damage; charging potential; high RF power plasma etch process; high radio frequency power passivation etch process; ion bombardment; wafer grounding; Circuits; Conductors; Etching; Grounding; Passivation; Plasma applications; Plasma confinement; Plasma properties; Radio frequency; Silicon;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Advanced Semiconductor Manufacturing Conference, 2008. ASMC 2008. IEEE/SEMI
Conference_Location :
Cambridge, MA
ISSN :
1078-8743
Print_ISBN :
978-1-4244-1964-7
Electronic_ISBN :
1078-8743
Type :
conf
DOI :
10.1109/ASMC.2008.4529054
Filename :
4529054
Link To Document :
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