Proof of concept of a high-throughput processor for broadband access networks

A high-throughput processor concept is being developed under the auspices of an ESA contract. It relates to a high-capacity, broadband satellite system for access networks that provides regional (e.g. European) coverage through a large number (>100) of broad-band user beams. At the heart of the system lies a transparent digital signal processor, which provides the necessary flexibility in beam routing and frequency mapping. Transparent digital signal processors are an established pedigree in mobile systems like Inmarsat 4. However, the capacity of High-Throughput-approximately 50 GHz-is vastly larger than in previous systems; thus High-Throughput represents a significant step forwards in transparent processor architecture and technology. This paper presents the details of an FPGA-based demonstrator of the High-Throughput processor, which is a scaled-down version of the full system design. The demonstrator implements complete (de)multiplexing, switching and beam-forming algorithms, all of which process at the full system rate (500 MHz per port). Accompanying the demonstrator processor is a flexible broad-band signal generation and analysis module, which provides means of generating stimulus and measuring the processorpsilas performance.