Overlay Control Requirements for Immersion Lithography

Immersion lithography has been developed to meet the requirements of shrinking design rules. With it are new sources of variability and challenges which need to be understood and characterized in order to gain the most from the innovative lithography technique. This paper will focus on the immersion overlay challenges by providing a comprehensive source of variance (SOV) study of 193 immersion scanners. We will compare scenarios of \´single machine\´ and \´single generation matching\´ using wafers processed through 193 nm immersion lithography tools. An ultra-dense sampling strategy is used to provide the data necessary to extract accurate conclusions regarding field and wafer (also referred to as "grid"), information. These measurements are then processed to determine the overlay SOV. The SOV analysis is broken down into wafer, field, and un-modeled components. A variety of overlay models and sampling schemes are then presented to illustrate how one can optimize the overlay control strategy to yield the required overlay residuals while providing the measurement robustness and throughput necessary for a high volume manufacturing environment. Finally conclusions will be drawn about optimal overlay sampling requirements and opportunities for high order correctable control (also referred to as HO or HOC).