DocumentCode
1564989
Title
Parallel simulation with a generic simulation framework featuring loose coupling
Author
Polaschegg, Mario ; Steger, Christian ; Dalton, Damian ; Vadher, Abhay
Author_Institution
Inst. for Tech. Informatics, Graz Univ. of Technol., Austria
fYear
2005
Firstpage
251
Lastpage
257
Abstract
For developing parallel systems composed of hard- and software, powerful simulation tools are needed in order to decrease time-to-market. With the generic simulation framework, clock-cycle accurate simulation for parallel devices communicating with each other is possible. This tool is designed to support different model techniques at various levels of abstraction and is used for verification and design-space exploration in the design process of the APPLES processor developed by the Irish company Neosera Systems.
Keywords
digital simulation; parallel processing; APPLES processor; clock-cycle accurate simulation; design-space exploration; generic simulation; loose coupling; parallel devices; parallel simulation; Atherosclerosis; Computational modeling; Discrete event simulation; Hardware design languages; Informatics; Message passing; Protocols; Software tools; Technological innovation; Time to market;
fLanguage
English
Publisher
ieee
Conference_Titel
Parallel Processing, 2005. ICPP 2005 Workshops. International Conference Workshops on
ISSN
1530-2016
Print_ISBN
0-7695-2381-1
Type
conf
DOI
10.1109/ICPPW.2005.67
Filename
1488702
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