DocumentCode :
1565019
Title :
Non-minimal routing strategy for application-specific networks-on-chips
Author :
Matsutani, Hiroki ; Koibuchi, Michihiro ; Yamada, Yutaka ; Jouraku, Akiya ; Amano, Hideharu
Author_Institution :
Dept. of Inf. & Comput. Sci., Keio Univ., Yokohama, Japan
fYear :
2005
Firstpage :
273
Lastpage :
280
Abstract :
We propose a deterministic routing strategy called flee which introduces non-minimal paths in order to distribute traffic with a high degree of communication locality in networks-on-chips. In the recent design methodology, target system and its application of the systems-on-a-chip are designed in system level description language like system-C, and simulated in the early stage of design. The task distribution is statically decided in this stage, and the amount of traffic between nodes can be analyzed. According to the analysis, a path that transfers a large amount of total data is firstly assigned with a relaxed limitation, thus it is mostly minimal. On the other hand, paths for small amount of total data, are secondly established so as not to disturb previously established paths, thus they are sometimes non-minimal. Simulation results show that the flee routing strategy improves up to 28.6% of throughput against the dimension-order routing on typical stream processing application programs.
Keywords :
system-on-chip; telecommunication network routing; telecommunication traffic; routing strategy; stream processing application program; system level description language; systems-on-a-chip; Bandwidth; Buffer storage; Computer science; Concurrent computing; Design methodology; Network-on-a-chip; Routing; System-on-a-chip; Telecommunication traffic; Traffic control;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Parallel Processing, 2005. ICPP 2005 Workshops. International Conference Workshops on
ISSN :
1530-2016
Print_ISBN :
0-7695-2381-1
Type :
conf
DOI :
10.1109/ICPPW.2005.59
Filename :
1488705
Link To Document :
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