DocumentCode :
1565345
Title :
A bit-serial approach to VLSI implementation of digital LDI ladder filters
Author :
Balestro, F. ; Privat, G. ; Tawfik, M.S.
Author_Institution :
CNET, Meylan, France
fYear :
1989
Firstpage :
2552
Abstract :
LDI (lossless discrete integrator, or leapfrog) digital ladder filters are shown to exhibit the most favorable properties for VLSI integration among low-sensitivity recursive filter structures. Using an exact synthesis procedure derived from the switched-capacitor-filter silicon compiler IMAN, novel structures realizing purely LDI-transformed all-pole and pole-zero transfer functions are generated. Dedicated systolic bit-serial architectures for these structures are investigated. A prototype chip for an eighth-order all-pole low-pass filter, fabricated in 1.2-μm CMOS technology, is presented
Keywords :
CMOS integrated circuits; VLSI; circuit layout CAD; digital filters; ladder networks; low-pass filters; poles and zeros; transfer functions; 1.2 micron; CMOS technology; IMAN; VLSI implementation; VLSI integration; all-pole; bit-serial; dedicated systolic bit-serial architectures; digital LDI ladder filters; eighth-order all-pole low-pass filter; exact synthesis; leapfrog; lossless discrete integrator; low-sensitivity recursive filter structures; novel structures; pole-zero transfer functions; switched-capacitor-filter silicon compiler; Band pass filters; CMOS technology; Digital filters; Flow graphs; Frequency; Low pass filters; Prototypes; Sampling methods; Transfer functions; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Acoustics, Speech, and Signal Processing, 1989. ICASSP-89., 1989 International Conference on
Conference_Location :
Glasgow
ISSN :
1520-6149
Type :
conf
DOI :
10.1109/ICASSP.1989.266988
Filename :
266988
Link To Document :
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