Implementation of a programmable digital receiver multi-chip module

The authors discuss the theory, implementation, and applications of the programmable digital receiver (PDRx) multichip module. The PDRx module comprises four digital receiver channels. The 9-in² module dissipates less than 25 W. The PDRx module accepts four 16-b-wide digital data streams at 33 MHz. The module then bandshifts, filters, and processes any signal in each input. These functions are all user programmable. The authors address the key innovative areas of the architecture as well as a number of applications. The applications include the digital demodulation of first, second, and M-level modulated signals, and cochannel interference reduction utilizing multiple receiver channels. The PDRx module contains multiple floating point processors which have a combined processing power of 100 million floating point operations per second. Utilizing these processors, the module supports a number of parallel processing configurations