Title :
Implementation of an asynchronous cellular logic network as a co-processor for a general-purpose massively parallel array
Author :
Lopich, Alexey ; Dudek, Piotr
Author_Institution :
Sch. of Electr. & Electron. Eng., Univ. of Manchester, Manchester
Abstract :
In this paper we present an implementation of an asynchronous cellular processor array that facilitates binary trigger-wave propagations, extensively used in various image processing algorithms. The circuit operates in a continuous-time mode, achieving high operational performance and low power consumption. A 24 times 60 proof-of-concept array integrated circuit has been fabricated in a 0.35 mum 3-metal CMOS process and tested. Occupying only 16 times 8 mum2 the binary wave-propagation cell is used as a coprocessor in a general-purpose processor-per-pixel array that is designed for focal-plane image processing. The results of global operations such as object reconstruction and hole filling are presented.
Keywords :
CMOS integrated circuits; cellular arrays; cellular logic; coprocessors; image resolution; CMOS process; asynchronous cellular logic network; binary trigger-wave propagations; continuous-time mode; coprocessor; focal-plane image processing; general-purpose massively parallel array; hole filling; image processing algorithms; object reconstruction; CMOS integrated circuits; CMOS process; Cellular networks; Circuit testing; Coprocessors; Energy consumption; Image processing; Image reconstruction; Integrated circuit testing; Logic arrays;
Conference_Titel :
Circuit Theory and Design, 2007. ECCTD 2007. 18th European Conference on
Conference_Location :
Seville
Print_ISBN :
978-1-4244-1341-6
Electronic_ISBN :
978-1-4244-1342-3
DOI :
10.1109/ECCTD.2007.4529542
