DocumentCode
1567894
Title
Design of an efficient digital down-converter for a SDR-based DVB-S receiver
Author
Perez-Pascual, A. ; Sansaloni, T. ; Torres, V. ; Almenar, V. ; Vails, J.
Author_Institution
Inst. of Telecommun. & Multimedia Applic., Politec. Univ. of Valencia, Gandia
fYear
2007
Firstpage
256
Lastpage
259
Abstract
This paper presents the design of an area-power efficient digital down-converter suitable for broadband communication systems. The DVB-S standard has been used as a design example. It has been shown that by selecting a bandpass sampling to generate only one spectral image, the case in which the relationship between the digital carrier frequency and the sampling frequency is 1/4, not only gives the smallest area but the lowest power consumption.
Keywords
digital video broadcasting; frequency convertors; receivers; DVB-S receiver; broadband communication systems; digital carrier frequency; digital down-converter; digital video broadcasting; sampling frequency; Circuits; Clocks; Digital video broadcasting; Energy consumption; Feedback loop; Filters; Frequency synchronization; Image sampling; Sampling methods; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuit Theory and Design, 2007. ECCTD 2007. 18th European Conference on
Conference_Location
Seville
Print_ISBN
978-1-4244-1341-6
Electronic_ISBN
978-1-4244-1342-3
Type
conf
DOI
10.1109/ECCTD.2007.4529585
Filename
4529585
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