Title :
Design of complex image processing systems in ESL
Author :
Schafer, Benjamin Carrion ; Trambadia, Ashish ; Wakabayashi, Kazutoshi
Author_Institution :
Syst. IP Core Lab., NEC Corp, Kawasaki, Japan
Abstract :
This work presents the design of a complex image processing IP developed completely in C. We present the latest advanced in ESL-synthesis and demonstrate its main advantages over conventional RT-level flows. In particular we focus on the ability of behavioral synthesis to shorten the design cycle, perform functional verification and explore quickly the design space obtaining multiple dominating implementations with unique area vs. speed characteristics from an initial untimed behavioral description. A feature extraction process is presented in detailed showing how automatic design space exploration can lead to Pareto optimal (non-dominant) designs ranging from 524,648 gates to 584,868 gates and latencies of 38 to 69 state counts for the smallest and fastest design respectively taking approximately 6.3 hours.
Keywords :
feature extraction; logic design; object detection; system-on-chip; ESL-synthesis; Pareto optimal design; SoC design; automatic design space exploration; complex image processing systems; electronic system level; face detection design; feature extraction process; functional verification; Acceleration; Application software; Control system synthesis; Delay; Feature extraction; Hardware; High level synthesis; Image processing; Software design; Space exploration;
Conference_Titel :
Design Automation Conference (ASP-DAC), 2010 15th Asia and South Pacific
Conference_Location :
Taipei
Print_ISBN :
978-1-4244-5765-6
Electronic_ISBN :
978-1-4244-5767-0
DOI :
10.1109/ASPDAC.2010.5419780
