Title :
A high-speed hardware implementation of the Hermes8-128 stream cipher
Author :
Kitsos, Paris ; Kaiser, Ulrich
Author_Institution :
Comput. Sci., Hellenic Open Univ., Patras
Abstract :
An efficient high-speed hardware implementation of the Hermes8-128 stream cipher is presented in this paper. Hermes8-128 is proposed for hardware based implementations in the eSTREAM project. Two FPGA devices are used for the hardware implementations. Especially, the XILINX (Spartan-2) 2S100-6 and (VIRTEX-4) 4VFX12-11 are used. A maximum throughput of 56.5 Mbps can be achieved with a clock frequency of 49 MHz with a XC2S100-6 device, while a throughput of 361 Mbps at 313 MHz is achieved with the 4VFX12-11 device. Since now only one previous reported Hermes8-128 hardware implementation exists, a comparison with the proposed one is given.
Keywords :
field programmable gate arrays; security of data; FPGA devices; Hermes8-128 stream cipher; XILINX; frequency 313 MHz; Clocks; Computer science; Cryptography; Design methodology; Field programmable gate arrays; Frequency; Hardware; Instruments; Measurement; Throughput;
Conference_Titel :
Circuit Theory and Design, 2007. ECCTD 2007. 18th European Conference on
Conference_Location :
Seville
Print_ISBN :
978-1-4244-1341-6
Electronic_ISBN :
978-1-4244-1342-3
DOI :
10.1109/ECCTD.2007.4529608
