Upset Characterization and Test Methodology of the PowerPC405 Hard-Core Processor Embedded in Xilinx Field Programmable Gate Arrays

Pseudo-static upset results for memory elements in the PPC405 core embedded in a 1.5 V, 130 nm Virtex-II Pro FPGA are compared to the PPC405 core embedded in a 1.2 V, 90 nm Virtex-4 FX FPGA. The results show consistency with earlier PowerPC processor measurements and illuminate scaling trends. While details vary, the upsetable elements consistently yield very low thresholds (below LET= 2 MeV/mg/cm² for heavy ions and 10 MeV for protons), but also small per bit limiting cross sections (below 10^-7 cm² for heavy ions and 10^-14 cm² for protons) and, therefore, moderate upset rates in space radiation environments.