DocumentCode :
1568464
Title :
Theoretical and practical minimum of the power Consumption of 3 ADCs in SC technique
Author :
Bechen, B. ; Boom, T. V d ; Weiler, D. ; Hosticka, B.J.
Author_Institution :
Fraunhofer Inst. for Microelectron. Circuits & Syst., Duisburg
fYear :
2007
Firstpage :
444
Lastpage :
447
Abstract :
In this paper the theoretical and practical minimum of the power consumption is investigated for 3 ADC architectures, which are predestined for low conversion speed and applications in low-power sensor readout circuits. The analysis is made for the switched capacitor versions of the SAR ADC, cyclic ADC and sigma-delta modulator. The theoretical limit of the power efficiency is investigated by a commonly used figure of merit (FOM). As a case study two low-power ADCs were designed and fabricated. In order to compare ADCs fabricated in different technologies a technology-independent FOM is introduced.
Keywords :
analogue-digital conversion; low-power electronics; readout electronics; switched capacitor networks; SC analog-digital converters; figure of merit; low-power sensor readout circuits; power consumption; successive approximation register; switched capacitor networks; Batteries; CMOS technology; Capacitors; Circuits; Energy consumption; Frequency estimation; Power supplies; Sampling methods; Switches; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuit Theory and Design, 2007. ECCTD 2007. 18th European Conference on
Conference_Location :
Seville
Print_ISBN :
978-1-4244-1341-6
Electronic_ISBN :
978-1-4244-1342-3
Type :
conf
DOI :
10.1109/ECCTD.2007.4529628
Filename :
4529628
Link To Document :
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