Gain-bandwidth restrictions for FET amplifiers with parasitic drain-to-gate coupling

Analytic gain-bandwidth theory for solid-state microwave-frequency amplifiers has been developed only under the assumption of a very crude modeling of the active device (e.g. an FET), i.e. a voltage-controlled current source loaded by two capacitors at the input and the output ports. It is well known that a realistic model includes many more passive elements, including which resistors to take losses into account. The authors have derived gain bandwidth restrictions for a FET amplifier equalized at both ends, under the assumption that the FET is modeled as a transconductance loaded by gate, drain and gate-to-drain parasitic capacitances.<>